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GepubliceerdPeter Michiels Laatst gewijzigd meer dan 9 jaar geleden
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--1-- An exploration of synchronization solutions for parallel short-range optical interconnect in mesochronous systems Harald Devos
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--2-- Introduction Optical links Synchronization Designs and simulations Conclusion
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--3-- Introduction Bitrate of electrical interconnects limited by the aspect ratio *: * D.A.B. Miller and H.M. Ozaktas use of Optical Interconnects
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--4-- Introduction long haul short haul
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--5-- Introduction long haul short haul BW, bitrate also latency important
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--6-- Introduction long haul short haul BW, bitrate also latency important high density, parallel
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--7-- Introduction long haul short haul BW, bitrate also latency important high density, parallel mesochronous Synchronization needed
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--8-- Introduction Optical links Synchronization Designs and simulations Conclusion
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--9-- Optical links
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--10-- Optical links latency IN OUT
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--11-- Optical links eye-diagram
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--12-- Optical links Jitter: HF, LF (wander) 2J T
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--13-- Optical links Skew S T S
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--14-- Optical links
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--15-- Introduction Optical links Synchronization Designs and simulations Conclusion
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--16-- Synchronization Synchronization = move data to the local clock domain Determine the phase Adjust the phase
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--17-- Synchronization Adjusting the phase Clk Data Auxiliary Clk
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--18-- Synchronization Adjusting the phase Clk Data Auxiliary Clk
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--19-- Synchronization Adjusting the phase DQDQ Clk Data Auxiliary Clk ?
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--20-- Synchronization Auxiliary clock: one of n clock phases Clk = C1 C1 C2 C3 C4 C5 T/5 e.g. n = 5
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--21-- Synchronization Choice of auxiliary clock T/n T/2n T/n
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--22-- Synchronization Parallel ? T/2-J-S T S T/2n
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--23-- Introduction Optical links Synchronization Designs and simulations Conclusion
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--24-- Designs Parallel Serial nn f f fff n.f n n Ref. Determine phase: use of a reference link
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--25-- Designs AMS 0,6 µm – technology, standard libraries, state-of-the-art Different phase detection: 1. AJTI: ‘artificial jitter injection’ 2. Flip-flop phase detectors
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--26-- Designs: AJTI Determine phase with AJTI Ref. …0101… 0101
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--27-- Designs: AJTI Determine phase with AJTI Ref. …0101… 0101 AJTI
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--28-- Designs: AJTI Determine phase with AJTI Ref. …0101… 0101 0000
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--29-- Designs: AJTI Disadvantages Reference: not flexible Initialization Extra delay
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--30-- Designs: FF phase detectors Determine phase with flip-flop phase detector Ref. ck ckQ Suited clock phases
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--31-- Designs: FF phase detectors Advantages Flexibility reference signal –Data signal –PRBS –Serial word synchronization
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--32-- Designs: comparison AJTI 2 or more clock phases Extra delay Initialisation problem Ref.=010101… FF phase detectors At least 4 clock phases Minimal delay Initialisation OK Ref.= signal with transitions
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--33-- Designs Area and Power consumption
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--34-- Introduction Optical links Synchronization Designs and simulations Conclusion
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--35-- Conclusion If skew en jitter are sufficiently low, synchronization can be optimized Using an extra link can simplify the circuits Greater uniformity needed to minimize skew
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--36-- Acknowledgments Joni Dambre, Wim Meeus, Dirk Stroobandt and Jan Van Campenhout
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--37--
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--38-- Questions ? ?
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--39--
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--40-- Not mentioned Generation clock phases Influence of coding Comparison Synchronization circuits
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--41-- Designs: flip-flop phase detector
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--42-- Optical links Properties optical links: Latency Jitter Skew
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--43-- Optical links Optical link
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--44-- Optical links Soorten ontvangers: Transimpedantie versterker (TIA) - belangrijk statisch verbruik => verbruik per bit neemt af met stijgende frequentie
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--45-- Optical links Soorten ontvangers: Geklokte versterker (sense-amplifier) - vooral dynamisch verbruik => verbruik per bit weinig afhankelijk van frequentie - zuiniger dan TIA - na bemonsteren geen ‘skew’ meer - klok nodig
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--46-- Optical links Klok nodig Meezenden referentiesignaal extra kost extra voordeel Ook nuttig voor niet-geklokte ontvangers ?
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--47-- Synchronization Mesochronous:
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--48-- Designs: AJTI Voordelen,benefits profits: - Methode bruikbaar voor willekeurig aantal fasen
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--49-- Designs: Gemeenschappelijke kenmerken Kost ~ 1/(# parallelle links) Hulpklok volgt fase bij drift Hulpklok: n e 1 e fase bit kwijt ! 1 e n e fase 2 maal zelfde bit!
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--50-- Introduction Optical links Synchronization Designs and simulations Conclusion
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