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Exploratie van de ontwerpruimte 2. De Hardware/software-grens Exploratietools Prof. dr. ir. Dirk Stroobandt Academiejaar 2004-2005.

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Presentatie over: "Exploratie van de ontwerpruimte 2. De Hardware/software-grens Exploratietools Prof. dr. ir. Dirk Stroobandt Academiejaar 2004-2005."— Transcript van de presentatie:

1 Exploratie van de ontwerpruimte 2. De Hardware/software-grens Exploratietools Prof. dr. ir. Dirk Stroobandt Academiejaar

2 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Inhoud (deel 1) Inleiding over Ingebedde systemen, System-on-Chip en Platform- gebaseerd ontwerp Systeemspecificatietechnieken Exploratie van de ontwerpruimte –Prestatiematen –De hardware/software-grens Raamwerk voor architectuurexploratie Hoogniveautransformaties Hardware/software-partitionering Exploratietools –Prototypes, emulatie en simulatie

3 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Parameters in HW/SW-partitionering Het systeemmodel –CDFG, FSM, Petri Nets, Structurele grafen –Granulariteit (ruw / fijn) De kostfunctie die de partitionering stuurt –« kwaliteit » gebaseerd op fabricatiekost, prestaties en het voldoen aan de beperkingen –Gebaseerd op schattingen Specifieke architectuur gekozen om het systeem te implementeren Type van toepassing

4 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Parameters in HW/SW-partitionering Het systeemmodel De kostfunctie die de partitionering stuurt Specifieke architectuur gekozen om het systeem te implementeren –Aantal en type van beschikbare componenten –Meestal processor + dedicated hardware –Dikwijls op voorhand vastgelegd (geen exploratie!) Type van toepassing –Data- en controlegeoriënteerde systemen –Alle systemen zijn toepassingsgericht

5 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Actual design flows and tools

6 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Comprises allocation (selecting components from a library), partitioning (mapping of parts of the system specification onto the components) & scheduling (serialization of execution). SpecC

7 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen SpecC abstract busses replaced by actual wires in a series of refinements

8 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen SpecC Compilers are used to generate binary machine code and hardware synthesis tools are used to generate custom hardware.

9 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen An actual example Getting started with the SCE window Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

10 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Browsing the specification Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

11 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen An actual example - Validation by simulation - Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

12 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Analyze profiling results Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

13 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen PE selection Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

14 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen The top level behavior is mapped to the DSP Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

15 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Estimate the performance (too slow) Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

16 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Selecting additional custom HW including datapath and controller Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

17 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Binding „codebook“ to the custom datapath Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

18 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Execution time of the DSP Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

19 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Execution time for hardware Assuming that sec is acceptable Copyright © 2002 by Center of Embedded Computing Systems (CECS), UC Irvine

20 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Cosynthesis for embedded micro- architectures (COSYMA) Ernst et al., Univ. Braunschweig

21 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Cosynthesis for embedded micro- architectures (COSYMA) C + process header Based on SUIF Simulation + analytical 1 process or integrated in part. Granularity=basic block One of the first co- design environments Software oriented

22 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Vulcan Developed at Stanford (Gupta, de Micheli) Hardware-oriented approach System model based on a set of flow graphs (CDFG) with communication –Within flow graphs: shared memory –Between flow graphs: message passing Cost function based on –Timing constraints –Processor and bus utilization –HW area –memory size

23 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen POLIS Aimed at control-dominated embedded systems Unified system representation = CFSM Input: Languages with FSM semantics –Esterel, Esterel-C, synthesizable HDL

24 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen POLIS (cont.) Analysis: –Formal verification (VIS) –System simulation (Ptolemy, VHDL) Abstract timing model of architectures Trade-off in mapping System design with user input Automatic synthesis –SW, HW, Interface and OS Event-based with zero-delay hypothesis

25 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen POLIS (cont.)

26 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen POLIS (cont.)

27 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Ptolemy II Ptolemy II supports specifications using different models of computation. In particular, it supports: 1.Communicating sequential processes (CSP). 2.Continuous time (CT): appropriate for ME, analog circuits. Supported by extensible differential equation solvers. 3.Discrete event model (DE): model used by many (e.g. VHDL) simulators. 4.Distributed discrete events (DDE). 5.Finite state machines (FSM). 6.Process networks (PN), using Kahn process networks 7.Synchronous dataflow (SDF) 8.Synchronous/reactive (SR) MoC. Discrete time, signals do not need to have a value at every clock tick. Esterel used.

28 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Ptolemy II Source … u/ptolemyII/ptII3.0/ptII3.0.2/doc/i ndex.htmhttp://ptolemy.eecs.berkeley.ed u/ptolemyII/ptII3.0/ptII3.0.2/doc/i ndex.htm Show Ptolemy II

29 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen

30 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen

31 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen

32 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Metropolis New framework developed at Berkeley and several other institutions and companies (GSRC effort) Recently released (2004) Framework for modelling General methodology –Functional decomposition –Behavior adaptation (for connected functions) –Media wrapper insertion –Communication refinement (channel adapters) –Mapping (into architecture of components) and optimization

33 Dirk Stroobandt: Ontwerpmethodologie van Complexe Systemen Metropolis (cont.)


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